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\begin{thebibliography}{10}
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\providecommand{\BIBdecl}{\relax}
\BIBdecl

\bibitem{theo14}
A.~Theodore~Markettos, P.~J. Fox, S.~W. Moore, and A.~W. Moore, ``Interconnect
  for commodity fpga clusters: Standardized or customized?'' in \emph{2014 24th
  International Conference on Field Programmable Logic and Applications (FPL)},
  2014, pp. 1--8.

\bibitem{digikey-ic}
\BIBentryALTinterwordspacing
{DigiKey Corporation}, ``Embedded - fpgas.'' [Online]. Available:
  \url{http://www.digikey.com/product-search/en/integrated-circuits-ics/embedded-fpgas-field-programmable-gate-array/2556262}
\BIBentrySTDinterwordspacing

\bibitem{dini-big-fpga}
\BIBentryALTinterwordspacing
{DINI}, ``Big fpga boards for code verification and asic prototyping.''
  [Online]. Available: \url{http://www.dinigroup.com/new/why.php}
\BIBentrySTDinterwordspacing

\bibitem{menc09}
O.~Mencer, K.~H. Tsoi, S.~Craimer, T.~Todman, W.~Luk, M.~Y. Wong, and P.~H.~W.
  Leong, ``Cube: A 512-fpga cluster,'' in \emph{2009 5th Southern Conference on
  Programmable Logic (SPL)}, 2009, pp. 51--57.

\bibitem{moor12}
S.~W. Moore, P.~J. Fox, S.~J. Marsh, A.~T. Markettos, and A.~Mujumdar,
  ``Bluehive - a field-programable custom computing machine for extreme-scale
  real-time neural network simulation,'' in \emph{2012 IEEE 20th International
  Symposium on Field-Programmable Custom Computing Machines}, 2012, pp.
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\bibitem{izhi03}
E.~Izhikevich, ``Simple model of spiking neurons,'' \emph{IEEE Transactions on
  Neural Networks}, vol.~14, no.~6, pp. 1569--1572, 2003.

\bibitem{kono12}
Y.~Kono, K.~Sano, and S.~Yamamoto, ``Scalability analysis of tightly-coupled
  fpga-cluster for lattice boltzmann computation,'' in \emph{22nd International
  Conference on Field Programmable Logic and Applications (FPL)}, 2012, pp.
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\bibitem{chen13}
C.~Liang, C.~Wu, X.~Zhou, W.~Cao, S.~Wang, and L.~Wang, ``An
  fpga-cluster-accelerated match engine for content-based image retrieval,'' in
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  2013, pp. 422--425.

\bibitem{neja11}
A.~B. Nejad, M.~E. Martinez, and K.~Goossens, ``An fpga bridge preserving
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\bibitem{intilop-toe}
\BIBentryALTinterwordspacing
{Intilop Corporation}, ``10 g bit tcp offload engine + mac + host interface
  (sxtoe).'' [Online]. Available: \url{http://www.intilop.com/ipcores.php}
\BIBentrySTDinterwordspacing

\bibitem{morethanip}
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{MorethanIP}, ``1/2/4/8gbps fibre channel transport core.'' [Online].
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\BIBentrySTDinterwordspacing

\bibitem{infiniband-cores}
\BIBentryALTinterwordspacing
{Polybus Systems Corporation}, ``Infiniband cores.'' [Online]. Available:
  \url{http://www.polybus.com/ib_link_layer_website/ib_cores_brochure_alt.pdf}
\BIBentrySTDinterwordspacing

\bibitem{aurora}
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{ReFLEX CES}, ``Focus on aurora-like 8b/10b at 3gbps.'' [Online]. Available:
  \url{http://reflexces.com/focus.html?s=aurora-like-8b10b-3gbps}
\BIBentrySTDinterwordspacing

\bibitem{altera-interface-protocols}
\BIBentryALTinterwordspacing
{Altera Corporation}, ``Interface protocols.'' [Online]. Available:
  \url{http://www.altera.co.uk/products/ip/iup/ipm-index.jsp}
\BIBentrySTDinterwordspacing

\bibitem{bunk13}
T.~Bunker and S.~Swanson, ``Latency-optimized networks for clustering fpgas,''
  in \emph{2013 IEEE 21st Annual International Symposium on Field-Programmable
  Custom Computing Machines}, 2013, pp. 129--136.

\bibitem{koua08}
Kouadri-Mostefaoui, Abdellah-Medjadji, B.~Senouci, and F.~Petrot, ``Large scale
  on-chip networks : An accurate multi-fpga emulation platform,'' in \emph{2008
  11th EUROMICRO Conference on Digital System Design Architectures, Methods and
  Tools}, 2008, pp. 3--9.

\bibitem{prit20}
P.~Narayanan, C.~E. Cox, A.~Asseman, N.~Antoine, H.~Huels, W.~W. Wilcke, and
  A.~S. Ozcan, ``Overview of the ibm neural computer architecture,'' 2020.

\bibitem{pci-to-sata-breakout-board}
\BIBentryALTinterwordspacing
{University of Cambridge}, ``Pcie to sata breakout board.'' [Online].
  Available:
  \url{http://www.cl.cam.ac.uk/research/comparch/opensource/pcie-sata/}
\BIBentrySTDinterwordspacing

\end{thebibliography}
